1. Field of the Invention
This invention relates to a semiconductor memory using a ferroelectric material having a hysteresis characteristic, and particularly to a semiconductor memory that performs refreshing by using a ferroelectric material having a relatively large reduction per hour in quantity of residual dielectric polarization in an electroless state.
2. Description of the Related Art
As recent semiconductor devices are expected be loaded on portable devices or mobile devices, lower-voltage operation and reduction in power consumption as well as reduction in size, weight and thickness are increasingly demanded of the semiconductor devices. It is known that forming a semiconductor device on an SOI (silicon-on-insulator) substrate can satisfy such demand and enables high-speed operation.
For example, by forming a device using perfect depletion-type SOI, it is possible to enable lower voltage/power saving and high-speed operation in comparison with a device on bulk Si. (For example, see Kouichi Yokomizo, xe2x80x9cApplication Field of FD-SOI Device,xe2x80x9d Lecture Articles of the 57th Integrated Circuit Symposium, 1999, pages 37-42.)
However, if a DRAM (dynamic random access memory), which is a semiconductor device and often used as a memory device of various equipment, is formed on a SOI substrate for the above-described purpose of lower voltage/power saving, a problem is found that a junction leakage current at a PN junction increases, compared with the case a DRAM is formed on the conventional bulk Si.
Generally, to hold data in a DRAM, a node between a capacitor electrode and a diffusion layer within the DRAM must be held at a potential that is not 0 V (or Vss: substrate potential). Therefore, the holding of data in the DRAM is determined by the magnitude of a junction leakage current from a PN junction. As the junction leakage current increases, the data holding time in the DRAM becomes shorter, and the cycle of refreshing the data held in the DRAM must be shortened. This is against power saving. Therefore, forming a DRAM on an SOI substrate while realizing power saving is a very difficult task.
To deal with this task, there is known an example of hybrid mounting of a DRAM and other devices on an SOI substrate by deleting a part of the SOI and forming the DRAM in that part, instead of simultaneously forming the DRAM and the other devices on the SOI substrate. (For example, see Toshiba Press Release on development of a DRAM cell hybrid mounting technique on an SOI wafer, Jun. 12, 2002, searched on the Internet on Jun. 28, 2002, at URL:http://www.toshiba.co.jp/about/press/2002xe2x80x9406/pr_j1201. htm.)
In consideration of the above-described reason for the difficulty in forming a DRAM on an SOI substrate while realizing power saving, for example, if the potential at a node between a capacitor electrode and a diffusion layer within the DRAM can be made 0 V (or Vss: substrate potential), the above-described problem can be solved, and lower voltage/power saving and high-speed operation are enabled in an SOI substrate on which a DRAM and other devices are mounted in a hybrid manner without deleting a part of the SOI. Conventionally, however, it is impossible to realize 0 V (or Vss: substrate potential) at a node between capacitor electrode and a diffusion layer in a DRAM or a substitute semiconductor memory.
As a candidate semiconductor memory that substitutes for a DRAM, for example, an E2PROM (electrically erasable and programmable read-only memory), which is a non-volatile semiconductor memory, may be considered. However, an E2PROM is not suitable for the user like a DRAM because its writing speed is much lower than that of a DRAM. As an E2PROM needs a high voltage writing data, it does not meet the demand for lower-voltage operation/reduction in power consumption. Moreover, since an E2PROM does not match SOI, it is not suitable for the user on an SOI substrate as a substitute for a DRAM.
As another candidate that substitutes for a DRAM, an SRAM (static random-access memory) that does not need refreshing if a power-supply voltage is applied thereon may be considered. Since an SRAM is a memory that is formed only by transistors and does not use a capacitor element, unlike in a DRAM, the data holding time is not decided by a leakage current. Therefore, an SRAM matches an SOI substrate well and enables high-speed operation similarly to a DRAM. However, an SRAM uses no capacitors but needs six transistors for per bit. Therefore, an SRAM cannot realize high integration equivalent to that of a DRAM and cannot meet the demand for reduction in size, weight and thickness.
As still another candidate that substitutes for a DRAM, an FRAM (ferroelectric random-access memory) may be considered. A typical FRAM is a memory that has been made non-volatile so that it needs no refreshing and can hold data even when a power-supply voltage is not applied thereon, by changing a paraelectric material used for a capacitor element of a DRAM to a ferroelectric material having a hysteresis characteristic.
The hysteresis characteristic of an FRAM is generated by the relation between an electric field (voltage) and polarization. For example, even if the voltages of both ends of the ferroelectric material (capacitor element) is made 0 V (short circuit) after a voltage of writing is applied, residual dielectric polarization due to the hysteresis characteristic exists in the ferroelectric material and therefore a current corresponding to the writing content can be outputted by applying a predetermined pulse field at the time of reading. Moreover, under typical conditions, the data holding time based on the hysteresis characteristic (residual dielectric polarization) of the ferroelectric material used for an FRAM is ten years or longer.
Therefore, as an FRAM instead of a DRAM is used on an SOI substrate, it is considered that a semiconductor memory that meets the demand for lower-voltage operation and reduction in power consumption as well as the demand for reduction in size, weight and thickness can be provided.
It is known that heat treatment in the mixed gas of N2 and deteriorates the hysteresis characteristic compared with the initial state, even if recovery heat treatment is later performed in oxygen. (For example, see J. Im, et al.4, xe2x80x9cStudies of hydrogen-induced degradation processes in SrBi2Ta209 ferroelectric film-based capacitors,xe2x80x9d Applied Physics Letters, American Institute of Physics, 22 Feb. 1999, Vol.74, No.8, pp.1162-1164.) In a process of manufacturing a semiconductor such as an FRAM, exposure to a hydrogen atmosphere is possible at every step. Therefore, at every step of the process of manufacturing a semiconductor using a ferroelectric material, the hysteresis characteristic of the ferroelectric material often deteriorates in a hydrogen atmosphere.
However, the value of residual dielectric polarization of the ferroelectric material used for the capacitor element of the above-described conventional FRAM is varied by even a small difference in composition of the ferroelectric material and a difference in the thin film forming process. Therefore, there is a problem that it is difficult to stably manufacture the ferroelectric material having a value of residual dielectric polarization that realizes a data holding time of ten years or longer.
In short, with the capacitor element of the conventional FRAM, it is difficult to manufacture a thin film of a ferroelectric material that maintains the quantity of residual dielectric polarization in an electroless state for many years, and a thin film of a ferroelectric material having the quantity of residual dielectric polarization reduced to less than a predetermined threshold value for reading out written contents after the lapse of a predetermined time tends to be manufactured.
In order to solve the conventional problems as described above, it is an object of the present invention to provide a semiconductor memory having an FRAM instead of a DRAM formed on an SOI substrate, using a ferroelectric material such that the quantity of residual dielectric polarization in an electroless state is not maintained for many years.
A semiconductor memory according to the present invention comprises a memory cell including at least one transistor element and at least one capacitor element, and for the capacitor element, a material is used such that the quantity of residual dielectric polarization in an electroless state in a hysteresis characteristic is not reduced to less than a predetermined threshold value until after the lapse of the time of a refreshing cycle including at least plural clocks. The semiconductor memory has a sense amplifier for detecting a bit line output current value due to residual dielectric polarization, the sense amplifier amplifying the bit line output current value to refresh the quantity of residual dielectric polarization of the capacitor element when the quantity of polarization based on the detected value is equal to or larger than a threshold value, and the sense amplifier not amplifying the bit line output current value when the quantity of polarization based on the detected value is less than the threshold value.
As described above, in the present invention, even when a ferroelectric material of imperfect or poor quality such that the quantity of residual dielectric polarization in an electroless state is not maintained for many years is used for an FRAM, the memory contents can be held by refreshing. Since data can be read out from an FRAM even when the voltages of a word line and a plate line are caused to be the same electric potential, a semiconductor memory having an FRAM instead of a DRAM formed on an SOI substrate can be provided. This semiconductor memory does not have the problem of increase in junction leakage current and can meet all the demands for reduction in size, weight and thickness, lower-voltage operation, reduction in power consumption, and high-speed operation. Higher integration, reduction in size, weight and thickness, lower-voltage operation, and reduction in power consumption can be realized.
Moreover, in the present invention, even when an ideal ferroelectric material for an FRAM is used, a paraelectric material may be combined and connected in series to intentionally make the memory non-volatile and the memory contents can be held by refreshing. Therefore, a semiconductor memory can be provided in which an FRAM similar to the above-described FRAM instead of a DRAM is formed on an SOI substrate.